The present invention relates to a semiconductor integrated circuit that is composed of thin-film semiconductor elements. The invention particularly relates to a monolithic active matrix devices, such as a liquid crystal display device and a dynamic RAM (DRAM), which have a matrix structure and in which an active matrix circuit including MOS or MIS (metal-insulator-semiconductor) field-effect elements (generally called MOS elements) that serve as switching elements for the matrix structure and a drive circuit for driving the active matrix circuit are formed on a single substrate. Further, the invention particularly relates to a device which uses thin-film transistors that are formed as MOS elements on an insulative surface at a relatively low temperature.
In recent years, in display devices having a matrix structure such as a liquid crystal display, studies have been made intensively of a matrix circuit (active matrix circuit) that uses thin-film transistors (TFT; insulated-gate semiconductor elements having thin-film active layers or regions) for switching of respective elements. In particular, a monolithic active matrix device in which not only an active matrix circuit but also peripheral circuits for driving it are formed on a single substrate using TFTs now attracts much attention. Since the monolithic active matrix device does not need connection of a large number of terminals, it is expected that the matrix density is increased and the production yield is improved.
To attain such purposes, it is necessary to use TFTs in which crystalline silicon is used for active layers, because the drive circuit is required to operate at very high speed.
To obtain such TFTS, the conventional semiconductor manufacturing technologies may be employed as they are, in which case, however, a substrate material should endure a high temperature of more than 900xc2x0 C. However, such a material is limited to quarts glass, with which the substrate cost is very high when it is of a large area.
To use a less expensive substrate, the maximum temperature of a manufacturing process should be reduced to lower than 800xc2x0 C., preferably lower than 600xc2x0 C. Even where a manufacturer can afford to use an expensive substrate, it is in some cases necessary for a manufacturing process to be performed at lower temperatures due to heat resistant performance of other materials constituting the circuits. In this case, active layers are formed by crystallizing amorphous silicon by, for instance, long-term thermal annealing at a temperature lower than 800xc2x0 C., or optical annealing (laser annealing etc.) in which amorphous silicon is instantly crystallized by application of high-intensity light such as laser light. On the other hand, because thermal oxidation films as used in ordinary semiconductor processes cannot be used as a gate insulating film, a film of a silicon dioxide, silicon nitride, silicon oxy-nitride, or a like material is used that is formed at a temperature lower than 800xc2x0 C. by vapor phase deposition such as plasma CVD, atmospheric pressure CVD, or sputtering.
On the other hand, TFTs using non-crystalline silicon such as polycrystalline silicon has a problem that a large drain current (leak current) flows when the gate electrode is reversely biased. It is known that this disadvantage can be much lessened by designing TFTs such that the gate electrode does not overlap with the drain (offset state). This type of transistor is called an offset-gate transistor. In the past, it was impossible to realize such an offset state with superior reproducibility by a photolithographic process. Japanese Unexamined Patent Publication Nos. Hei. 5-114724 and Hei. 5-267167 disclose solutions to this problem. That is, an offset can be formed by properly utilizing an increased gate portion obtained by anodic oxidation of the gate electrode.
Even if the offset gate is not intended, an anodic oxide film formed around the gate electrode provides an advantage of preventing hillocks in a subsequent heating process (for instance, a film deposition process by laser illumination or CVD), for instance, in the case where the gate electrode is formed by a material of insufficient heat resistance such as aluminum.
However, an insulative film formed by vapor deposition suffers from low film quality. Further, due to insufficient junction performance of the boundary between the surface of a silicon film and a gate insulating film, there occur many charge trap centers (particularly electron trap centers) at the boundary between the silicon film and the insulating film and in the insulating film. Therefore, when TFTs using such a material are used for a long time, many electrons are trapped by the trap centers, deteriorating characteristics of the TFTs.
Further, the anodic oxide film that is left for the offset formation similarly has many trap levels; in particular, an aluminum oxide film formed by anodic oxidation of aluminum likely traps electrons. This will deteriorate characteristics of TFTs when they are used for a long time.
Specifically, in an N-channel TFT, a weak-P-type region that is formed at a boundary portion between the drain and the channel forming region by trapped electrons (see FIG. 7(A)) obstructs a drain current.
The formation of such a weak-P-type region is remarkable in an offset-gate TFT due to the following reason. In an actual operation, a weak-P-type region formed right under the gate electrode can be made smaller by voltage application to the gate electrode. However, because a weak-P-type region formed in the offset region is not much influenced by the gate electrode and is far away from the drain region, it is completely uncontrollable.
An anodic oxide film formed around the gate electrode has similar problems. In particular, when the drain voltage is low, an inversion layer (i.e., a channel) that should extend from the source to the drain is obstructed by a weak-P-type region. In addition, because of the low drain voltage, carriers (electrons because an N-channel TFT is now considered) moving through the channel-forming region has a low speed. Thus, the drain current is smaller than in the ordinary state (see FIG. 7(B)).
When the drain voltage is sufficiently high, the inversion layer itself retreats even in the normal state and electrons move at high speed. Therefore, the existence of a weak-P-type region is not a serious problem, but there can be obtained characteristics equivalent to those in the normal state.
The above-described phenomenon means a variation of the threshold voltage of an N-channel TFT. That is, the above-described N-channel TFT cannot be used for applications that require the threshold voltage to be stable, for instance, switching elements in an active matrix circuit or analog switch elements in peripheral drive circuits for the active matrix circuit.
In a P-channel TFT, in which trapped electrons simply adds a region having the same conductivity type as the drain in the channel region, there occurs no serious deterioration of characteristics.
Due to the above problems, a complementary (CMOS) circuit composed of N-channel TFTs and P-channel TFTs has a problem that it does not work properly after long-term usage because of deterioration of the N-channel TFTs. In a monolithic active matrix circuit, analog switches are needed at output ends of an active matrix circuit and a source driver. The above problems should be addressed in forming such analog switches. Further, in a monolithic active matrix circuit, a CMOS circuit is usually used in a logic circuit of peripheral drive circuits, as described in U.S. Pat. No. 4,582,395. The above-described problems of deterioration should be considered in forming such a monolithic active matrix circuit.
The present invention is intended to provide solutions to the difficult problems described above.
In particular, the above-described problems should be solved in the first place in a monolithic active matrix circuit, which is an integrated circuit having, on a single substrate, an active matrix circuit for performing image display by applying an analog electric field between opposed electrodes between which a material, such as a liquid crystal, whose transmittance or reflectance is varied by application of an electric field is inserted and peripheral circuits for driving the active matrix circuit.
According to a first aspect of the invention, all the transistors constituting a monolithic active matrix circuit are P-channel TFTs, and the TFTs constituting an active matrix circuit are of an offset-gate type. In particular, the offset-gate TFTs are produced by coating the gate electrodes with an anodic oxide film by subjecting those to the anodic oxidation as disclosed in Japanese Unexamined Patent Publication No. Hei. 5-114724 or Hei. 5-267167.
According to a second aspect of the invention, all the TFTs are P-channel TFTs in a monolithic active matrix circuit in which a gate insulating film is formed at a temperature not higher than 800xc2x0 C.
According to a third aspect of the invention, all the transistors constituting a monolithic active matrix circuit are P-channel TFTs, and at least one of the TFTs constituting a drive circuit for an active matrix circuit is of an offset-gate type. In this case, as in the case of the first aspect, the offset TFTs may be formed by subjecting the gate electrodes to the anodic oxidation.
According to a fourth aspect of the invention, in a monolithic active matrix circuit, an anodic oxide film of a gate electrode is left on at least a side face of at least one of TFTs that constitute an active matrix circuit or a peripheral drive circuit therefor, and all the transistors of the monolithic active matrix circuit are P-channel TFTs.
A description will be made of the operation of the invention. It is natural to use offset-gate TFTs having an advantage of a small leak current as TFTs constituting an active matrix circuit which are required to have a high charge holding ability. However, if the offset-gate TFTs are used, the active matrix circuit is deteriorated because a weak-P-type region formed in an N-channel TFT cannot be controlled from the gate electrode or the drain region, as described above. This is fatal to devices, such as the active matrix circuit, that are expected to have sufficient characteristics for analog switches. Even in the other circuits, the use of an N-channel TFT is not preferable in terms of deterioration.
As is understood from the above, it is necessary that all the TFTs be of a P-channel type in a monolithic active matrix circuit that uses offset-gate TFTs in an active matrix circuit (first aspect of the invention). With this configuration, superior circuit characteristics and high reliability have been obtained.
As described above, in a monolithic active matrix circuit, many electrons are trapped in a TFT using a gate insulating film that was formed at a temperature not higher than 800xc2x0 C., so that characteristics of an N-channel TFT are greatly deteriorated. Therefore, it is necessary that all the TFTs be of a P-channel type in a monolithic active matrix circuit using TFTs that have a gate insulating film formed at a temperature not higher than 800xc2x0 C. (second aspect of the invention). With this configuration, superior circuit characteristics and high reliability have been obtained.
It is natural to use offset-gate TFTs having an advantage of a small leak current as TFTs constituting a switching circuit of a peripheral drive circuit such as an analog buffer circuit which TFTs are required to have a high charge holding ability. However, if the offset-gate TFTs are used, the peripheral drive circuit is deteriorated because a weak-P-type region formed in an N-channel TFT cannot be controlled from the gate electrode or the drain region, as described above. This is fatal to devices, such as the analog buffer circuit, in which the stability of the threshold voltage is most necessary. Even in the other circuits, the use of an N-channel TFT is not preferable in terms of deterioration.
As is understood from the above, it is necessary that all the TFTs be of a P-channel type in a monolithic active matrix circuit that uses offset-gate TFTs in a peripheral drive circuit such as an analog buffer circuit (third aspect of the invention). With this configuration, superior circuit characteristics and high reliability have been obtained.
As described above, irrespective of an object of forming offset gates, coating gate electrodes with an anodic oxide film is very advantageous. However, the anodic oxide film likely traps charges. In particular, an anodic oxide film left on the side face of a gate electrode, which is close to a gate insulating film, likely traps electrodes and electrons trapped at such locations greatly affect the characteristics when TFTs are of an N-channel type. Therefore, it is necessary that all the TFTs be of a P-channel type in a monolithic active matrix circuit having TFTs in which an anodic oxide film is left on the side face of the gate electrode (fourth aspect of the invention). With this configuration, superior circuit characteristics and high reliability have been obtained.